Dai Nippon Printing Co., Ltd. (DNP) has developed a new lead frame in response to efforts to slim down the semiconductor package mounted on electronic device, including mobile terminals and PCs. Using this lead frame it has become possible to achieve a semiconductor package with a thickness of 0.15mm, or approximately 1/20th the thickness of existing general products, which is the slimmest molded package in the world to date.

[Developmental Background]
In line with the shift to more compact and increasingly high performance in a variety of electronic device, including the popularity of mobile PCs and the many mobile phones which now have PDA functions, there has been a sharp pick up in demands for the further downsizing, slimming down and higher densification of semiconductor packages. There has been a subsequent expansion in the market for packaging which mounts semiconductors on a three dimensional basis, including those types which multilayer the semiconductor packaging, and those which multilayer the IC chips.
In the case of multilayered IC chip type semiconductor packaging; while it is relatively easy to achieve a slimming down of the overall package, given that it is the IC chip itself which is multilayered, other issues remain, including the fact that it is not easy to assure the quality of each individual multilayered chip, and also of declining yields. As a result, DNP considered the multilayered semiconductor package type, where the quality of the IC chips can be screened on an individual basis, to be the optimum type for its purposes, and has developed a lead frame for use with the world’s slimmest molded semiconductor package.

[Overview of the New Packaging]
The new packaging developed by DNP differs from existing formats created by mounting the IC chip on top of the lead frame. DNP has established a technology which leaves only the necessary circuit portion of the lead frame, removes the plate mounting for the IC chip, and in cases where it is structurally necessary, etches the lead frame portion used for mounting the IC chip into a concave shape, into which the IC chip is then embedded. By downsizing not only the lead frame, but also slimming down the IC chip and mold to the maximum possible extent, it has become possible to create a semiconductor package which is significantly thinner than existing products.
The precision of the plated area has been improved by roughly three fold to ± 0.050mm from the existing ±0.150mm, and it has also been possible to achieve improvements in humidity reliability, at the same time.

The lead frame with an embedded IC chip and using a high precision plating format developed by DNP completed U.S. patent registration in July 2008, with domestic Japanese patents pending as we go to press.

[Forward Looking Developments]
DNP aims for approximately ¥300 Mln in sales in the year beginning April 1. The company will also exhibit this new lead frame at the DNP booth (West 6-14) at the NEPCON WORLD JAPAN (the 10th PRINTED WIRING BOARDS EXPO) to be held at Tokyo Big Sight from January 28.