Dai Nippon Printing Co. Ltd. (DNP) is pleased to announce the development of a cutting edge micro-fabricated next generation lead frame, facilitating downsizing of, and lower costs for, semiconductor packaging.
This newly developed product is a leadframe for a land grid array (LGA) package, one of surface mounted and cutting edge plastic semiconductor packages. By fine patterning and aligning in rows connection points with a semiconductor chip, known as lands, a miniaturized, high performance semiconductor chip can be mounted on the leadframe. This new product has also made it possible to achieve approximately 1/4 in volume compared to a quad flat no lead (QFN*) package, the smallest semiconductor package in circulation at present.
By half etching base metal of the leadframe and making its inner leads longer for the first case in the world, DNP has succeeded in shortening the distance between a semiconductor chip and the leadframe, and reducing drastically the amount of gold wires used to connect between them, realizing lower cost of packaging.

[Developmental Background]
In line with the shift of various electronics devices to smaller size and higher performance, including making PCs easier to carry around and the emergence of mobile phones equipped with PDA functions, mobile electronic devices have been put to practical use integrating functions such as PC, communications and audio visual functions, and it is required to mount more functions on these devices. In response to these needs, there has been a sharp increase in demands for downsized, lower profile, high density semiconductor packages.
In order to meet these demands, DNP has advanced development of miniaturized, low profile, high function lead frames for semiconductor packages. By using the fine etching technology, DNP has succeeded in development of a lower cost leadframe for a LGA package, which has more terminals than a standard QFN package and is suitable for high performance semiconductor chips.

[Service Overview]
Numerous companies have attempted to develop lead frames for LGA packages. As for the leadframe developed by DNP, its base metal is half-etched and its inner leads are lengthened. It successfully shrinks the distance between a semiconductor chip pad and the inner lead to 0.8mm from the existing 2.5mm, reducing the amount of gold wires to 1/3 of those currently used when bonding.
By changing the land configuration to two rows from a single row of a QFN package, the length of the LGA package is reduced by 40 percent, the breadth by 40 percent and the height by 20 percent, realizing approximately 1/4 in the total volume compared to the QFN package. The land configuration was originally a single row due to design based reasons relating to the etching process, but by improving technologies for controlling half-etching, the two row land configuration has become possible.

[Forward Looking Activities]
DNP will launch the production of the lead frame for LGA packages from June 2009, and targets sales of 500 million yen in the year ending March 31, 2011. Based on these sales, the cost saving effect of the lead frame from the reduction of gold wires used by semiconductor makers will amount to approximately 1.0 billion yen in the year to March 31, 2011.

[Reference Materials]

[At left] X-ray photo of QFN package (40 pins, 6mm square) [At right] X-ray photo of newly developed LGA packaging (116 pins, 10 mm square)