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Highly precised, multi-layered, organic build-up package substrates were
developed to respond to the need for high-speed, large-scaleintegrated chips.
Because circuits are formed on pure copper conductors, resistance is low. And
because an insulation layer is formed by organic resin, permitivity is low, and
the substrate is very lightweight. This highly precised, multi-layered, organic
package substrate uses what is considered the most superior method of forming
fine pitch metal wiring, the semi-additive method. It also
uses the short wavelength laser processing method for forming
the three-dimensional connections between the fine pitch metal wiring and thereby
achieves high density on two-dimensional and three-dimensional levels. This highly
precised, multi-layered, organic build-up package substrate is highly reliable
and can be mounted on semiconductor chips for a variety of applications, thus
meeting diverse customer needs. Backed by a total support system, DNP offers customers
everything from design to simulation testing. |
Manufacturing method for highly precised, multi-layered, organic
build-up package substrate
Fig. 1 Manufacturing method for highly precised, multi-layered, organic build-up
package substrate |
Outline of manufacturing method for highly precised, multi-layered, organic
build-up package substrate.
Two types of objects are used as the base substrate onto which the highly precised
circuits will be formed: 1) formed on an insulation substrate (which consists
of a particular epoxy resin, such as BT and FR-4, embedded with glass cloth reinforcement)
by etching; and 2) a two-sided wiring (core circuit) substrate with penetration
holes formed by drilling.
Lamination is used to form an insulation layer: the process uses an insulation
film which provides the two-sided substrate (or multi-layered substrate) with
insulation and heat-resistance properties.
A short wavelength laser is used to selectively form holes
on the part of the laminated insulation layer where three-dimensional connecting
will occur.
The semi-additive method is used to simultaneously carry out
fine pitch wiring and conduction of the holes on both sides of the insulation
layer in which holes were made. This completes the process for the first layer.
By repeating the process for the first layer several times, DNP can produces a
highly precised, multi-layered wired substrate with precised three-dimensional
connections.
A protective solder resist film is applied to the top layer of the highly precised,
multi-layered substrate so that the metal pad is exposed. The surface of the metal
pad is processed to ensure optimal connection with the semiconductor chip. This
completes the highly precised, multi-layered, organic build-up package substrate.
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Semi-additive method
Fig.2 Semi-additive wiring manufacturing method |
This manufacturing technique forms fine pitch metal wiring on organic or
non-organic insulation material. After forming a thin-film metal layer on the
insulation material through chemical copper plating, fine pitch metal wiring is
formed through photolithography and copper electroplating. This technique also
provides electrical insulation for wiring by using etching to remove parts of
the thin-film metal layer other than the metal wiring. And because this semi-additive
technique forms the fine pitch wiring and connects the tiny holes (vias) in the
same process, DNP can produces semiconductor package substrates and other products
with multiple pins and high-density three-dimensional connections in the most
cost-effective manner best suited to customer needs.
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Photo 1 60 micron pitch wiring formed using the semi-additive method |
Short wavelength laser processing technology
This is a technology for creating tiny holes in insulating material using
ultraviolet wavelength light (355 nm). This is the most effective technology for
creating tiny holes because the short wavelength causes no heat damage to the
material being processed. This method is ideal for processing not only organic
insulation materials, but also for organic insulation materials containing glass
cloth, non-organic insulating material including ceramics and quartz, as well
as SUS metals such as copper.
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Design and simulation testing technology
DNP offers a wide range of design, testing, and analytic services for customers.
These include designing the wiring for package substrates onto which semiconductor
chips will be mounted; calculating the location of, and designing the wiring for,
MCM substrates onto which will be placed multiple electronic devices; analyzing
noise parameters that influence electronic signal quality parameters such as signal
propagation delay, switching noise, and crosstalk noise; and, after mounting the
chip on the package, conducting measurements and analysis on heat and construction
factors including heat dissipation and the fatigue and life of soldered connections.
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