Nanoimprint lithography accelerating carbon neutrality in semiconductor production

Image of the digital infrastructure supported by semiconductors

Digitalization is bringing sweeping changes to how industries operate, and the semiconductor sector is no exception. The growth and expansion of fifth-generation (5G) wireless networks, and the Internet of Things (IoT), as well as the improvement of smartphones, tablets and other digital devices, require a high degree of functionality for semiconductors, which use a huge amount of power during the manufacturing process. In recent years, the market has been demanding a new technology that realizes both miniaturization and low production power consumption. This is essential to achieve carbon neutrality, or no net release of carbon dioxide into the atmosphere.

To meet these challenges, Dai Nippon Printing Co., Ltd. (DNP), has developed nanoimprint lithography (NIL). This promising new technology for next-generation semiconductor production is based on DNP’s microfabrication technology. DNP is a company that can provide NIL templates for the semiconductor industry around the world. The editorial department of DNP Features here presents an in-depth look at this innovative NIL technology.

  • Resolving technological challenges in manufacturing next-generation semiconductors
  • Reducing power consumption to one-tenth with NIL
  • Further improvement in NIL to meet future requirements

Resolving technological challenges in manufacturing next-generation semiconductors

In 1969 -- the dawn of the semiconductor-related business in Japan and abroad -- DNP succeeded in manufacturing a prototype of photomasks, which are used as original plates for making patterns in semiconductor manufacturing. In the following decades, the company devoted itself to researching and developing microfabrication technologies that improved the processing speed of semiconductor devices with denser, smaller and more precise circuits in the processors.

Mechanism of lithography technology

Light is irradiated on the surface of the substrate coated with a photosensitive material. The parts that are exposed to light solve with a development chemical, while those not exposed to light remain unchanged, thus creating patterns. DNP further developed lithography technology that had been used in making printing plates, and applied it to the fabrication of photomasks and color filters for liquid crystal displays (LCD). Photomasks require nanometer-level precision, and LCD color filters require micrometer-level precision.

In the late 2010s, the conventional method using UV light was no longer able to deal with market demand for finer microcircuits. This led to research and development of manufacturing technology for next-generation semiconductors. That in turn gave rise to EUV lithography, which is capable of making fine circuit patterns by irradiating extreme ultraviolet light, as EUV has a shorter wavelength than conventional UV light, specifically, a 13.5 nanometer wavelength. Since this is extension of conventional lithography technology, it is possible to use previous knowhow involved in semiconductor manufacturing. This next-generation technology has already been put to practical production use, but it comes with a major problem: a huge amount of energy is required to manufacture state-of-the-art semiconductors.

Power consumption in semiconductor manufacturing

As the feature size of the semiconductor becomes smaller, power consumption in device manufacturing grows. Currently, manufacturing one wafer with five nano nodes that is used in cutting-edge devices requires the same amount of power used by an average household in about four months, according to one estimate.
Source: IEDM2020

The Japanese government, meanwhile, has adopted the “Green Growth Strategy” to realize a “positive cycle of economic growth and environmental protection,” backed up by a robust digital infrastructure. The government aims to achieve the global goals of digitalization and greenness. Reducing power consumption during semiconductor production is therefore a must if Japan wants to boost the semiconductor market, which is expected to grow as the country’s digital infrastructure is strengthened. NIL offers a solution to the daunting task of cutting both power consumption and costs.

Reducing power consumption to one-tenth with NIL

NIL allows the transfer of nanometer-level circuit patterns of resin on the substrates by using the template like a stamp.

Mechanism of Nanoimprint lithography

By pressing a template on an ultraviolet (UV) curable resin-coated substrate and curing the resin by chemical reactions using UV light, circuit patterns are transferred. This can not only form smaller circuits than older technologies, but also simplifies the production process without a development process step, thus cutting costs and energy consumption during the manufacturing process.

Since 2003, DNP has been developing templates for NIL. Based on the knowhow accumulated over many years, DNP succeeded in April 2015 in launching a business solution harnessing nanoimprint technology. DNP was one of the first companies in the industry to provide a one-stop service to design templates, make test products and mass-produce templates.

News release dated April 15, 2015
DNP Launches New Nanoimprint-based Ultra-Micro Machining Business
https://www.dnp.co.jp/eng/news/detail/1191793_2453.html

In 2021, NIL DNP jointly succeeded with Canon Inc. and Kioxia Corporation* in reducing power consumption in the lithography process during semiconductor manufacturing to one-tenth used by the conventional method. This could be a great opportunity for manufacturers hoping to achieve carbon neutrality by the end of 2050, as pledged by many nations, including Japan.

*Canon is in charge of developing technology for an imprint tool, while Kioxia is in charge of semiconductor production technology that can fabricate patterns precisely on a substrate. DNP is in charge of making templates, which play a central role in NIL, applying the technological knowhow accrued in photomask development.

The properties of NIL are realized by not using light imaging, which is used in conventional lithography. In the process using light-imaging exposure, it is difficult to make patterns smaller than the wavelength because of light diffraction. Special additional process steps are therefore required to make semiconductors with a line width of 40 nanometers or less, thus requiring more time, effort and money. After trial and error, DNP developed NIL by applying its printing technology and knowhow, and combining it with various other technologies and knowhow accrued over the years.

Further improvements for NIL to meet future requirements

DNP has the most advanced technology and capability for manufacturing NIL templates for cutting-edge semiconductors. Further development work has already started to identify potential issues in the application of this technology for actual mass production in coming years. DNP will upgrade the technology to meet increased demand expected for chip shrink, or reducing the size of the circuit on a chip without changing its basic design.

Roadmap of required minimum line width in semiconductors

The feature size of semiconductors is expected to become much smaller. According to the International Roadmap for Device and Systems (IRDS), an international industrial association tasked with making roadmaps for semiconductors, the required line width of semiconductors in 2030 and beyond is projected to be 10 nanometers or less. Source: IRDS 2020 SPIE meeting

Moreover, DNP has developed NIL three-dimensional templates. This technology is expected to generate new semiconductor devices and functions, as well as non-semiconductor applications. Samples of various shapes are already being made for three-dimensional templates.

Sample of three-dimensional templates
Template for wiring processing
(Dual damascene wiring)
Sample of three-dimensional templates
High-aspect ratio pillars
Sample of three-dimensional templates
Three-dimensional template that can be made into any shape
Sample of three-dimensional templates
Cone-shaped template

The semiconductor industry is getting an increasing amount of attention. For example, the “Strategy for Semiconductors and the Digital Industry” released in June 2021 by Ministry of Economy, Industry and Trade (METI) defines semiconductor-facilitated digitalization as the foundation of all industries. DNP, a market leader in photomasks for manufacturing semiconductors, is committed to conducting further research and development in diverse areas – from shrinking dies and saving energy in semiconductor production, to tackling future-oriented missions such as making templates three-dimensional. Going forward, DNP will meet demand from a wide variety of industrial sectors associated with semiconductors with its state-of-the-art nanotechnology.

Image of digitization spreading to various fields originated with semiconductors

METI’s Strategy for Semiconductors and the Digital Industry points out that digitalization, which originated with semiconductors and spread to digital infrastructure, digital industry and then to all industries, is indispensable in dealing with issues such as achieving carbon neutrality and regional revitalization, as well as solving problems associated with the graying population and the chronically low birthrate.

Brief explanation

At the Japan World Exposition 1970 in Osaka, DNP displayed a 100-year calendar, which was made with state-of-the-art microfabrication technology available at that time. Many visitors lined up in front of the exhibition venue, and were reportedly astonished by the technology used to make such a tiny calendar of 100 years, which was engraved inside a 1.5 square-centimeter area on a silicon wafer. It was an epoch-making exhibit. While the standard line width of semiconductors was 10 micrometers in the early 1970s, DNP was able to realize patterns with lines 5 micrometers wide in this calendar, showcasing the company’s technological capability. DNP is now capable of drawing a calendar of a million years – 10,000 times more than 50 years ago – inside a square of the same size.

Image of 100-year calendar
  • * Publication date: April 8, 2022
  • * DNP department names, product specifications and other details are correct only at the time of writing. They are subject to change without prior notice.