DNP to Commence Mass-Production of Nanoimprint Lithography Templates for Semiconductors

Capitalizes on low-cost next generation lithography technology

Dai Nippon Printing Co., Ltd. (DNP) is pleased to announce the establishment of a production system for templates used in nanoimprint lithography (NIL) that is compatible with semiconductor manufacturing at the 20nm level.

NIL is in the news as an innovative next-generation lithography technology facilitating significant cost savings. This is based on the fact that the structure of the manufacturing equipment is relative simple, and there is no need for complicated optical devices.

Mass production is set to commence during 2015, and will begin with master templates and replica templates produced from the master templates.

[Development Background]

Since launching a business based on the photomasks that are semiconductor circuit masters in 1961, DNP has consistently been involved in the development of fine processing technology, and has emerged as a major photomask maker with a 15% share of the global market at present.

In recent years in order to reply to semiconductor circuit miniaturization needs, semiconductor manufacturers have introduced new technologies such as multi-patterning that breaks down the circuit patterns into multiple photomasks for exposure. This has been aimed at the continuation of optical lithography techniques based on reduced projection exposure. These new technologies, however, present the challenge of increased costs due to the more complicated manufacturing processes and increased number of parts such as photomasks. By way of contrast, while NIL achieves significant cost reductions, the template exhausts itself during mass production, creating the need for periodic switching. A replica template used to emboss circuit patterns on silicon wafers is produced from a master template of the same size as the semiconductor circuit. So far, however, it has been difficult to manufacture master templates at the 20nm level and produce replica templates in a stable manner.

DNP has been engaged in NIL template development since 2003, and has accumulated considerable know how in this area. And by capitalizing on the technology nurtured from over 50 years' experience in the photomask business, and the Company' s strengths in printing derived technologies capable of transferring fine patterns through a tight fitting of the mold, DNP has been able to establish a 20nm level NIL template production system ahead of its competitors.

[New Template Mass-Production Features]

  • The stable supply of next generation lithography technology-based 20nm level templates that reply to semiconductor manufacturer demands for miniaturization and lower costs
  • In addition to introducing high-resolution lithographic devices necessary for the manufacture of master templates, a review has also been made of the materials and condition of those devices, along with the manufacturing processes to establish the technology for configuring 20nm level patterns.
  • As mass production of replica templates is a process involving direct contact between template and imprint material, in the past there have been issues with the contamination, and of resultant pattern defects. As a result of thorough clean management of plant, the elimination of contamination brought into the processing environment, and the adoption of substrate cleaning techniques this challenge has been overcome and process technology established.
  • Semiconductor manufacturers are in a position to achieve major cost reductions as a result of these simplifications of the manufacturing process.

[Looking Ahead]

In addition to efforts aimed at making DNP templates the de facto industry standard, as a result of a hybrid-supply system based on optical lithography photomasks currently offered by the Company and NIL templates that are next-generation lithography technology, we will be able to supply total lithographic solutions and make a significant contribution to the semiconductor industry.

DNP will offer the nanoimprint lithography template to be mass-produced to semiconductor and electronic equipment manufacturers, aiming for total sales of 5.0 billion yen in FY 2015 and 2016. Development will also be pursued towards the realization of a manufacturing system for templates below 15nm by FY 2017.

 

Newly established semiconductor manufacturing process

NIL process diagram

Manufacturing process based on existing methods (Reduced projection exposure-based optical lithography technique)

 

* Product prices, specification and service contents mentioned in this news release are current as of the date of publication. They may be changed at any time without notice.